MM1495 データシートの表示（PDF） - Unspecified

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MM1495

I2C BUS Control 5-Input 2-Output AV Switch

Unspecified 

MITSUMI

I2C BUS Control 5-Input 2-Output AV Switch MM1495X

Sync sepa select

Mode

Video

input

Video

output

S2

S1

V2

V1

TV

VOUT2

VOUT1

YOUT

Output

Y/VINS2

Y/VINS1

VINV2

VINV1

VINTV

VOUT2

VOUT1

YOUT

Bus data

Sync sepa select

b22

b21

b20

1

1

0

1

0

0

0

1

1

0

1

0

0

0

0

1

1

1

1

0

1

0

0

1

Output port switching

Mode

Bus data

Output port switching

Port

Condition

b27

b26

b25

b24

b23

Open

0

I/O1

Low

*

*

*

*

1

Open

0

I/O2

Low

*

*

*

1

*

Open

0

I/O3

Low

*

*

1

*

*

Open

0

O4

Low

*

1

*

*

*

Open

0

O5

Low

1

*

*

*

*

[Status registers]

Status registers are data to inform the master of the device status.

The data format is set as shown in the following figure.

Slave address

R/W

Status register

S

A

NA P

1 0 0 1 0 0 0/1 1

b37 b36 b35 b34 b33 b32 b31 b30

Address byte

device status

Out of the Address byte, first 7bit are assigned to the slave address, while the residual 1bit is assigned to the

R/W bit.

Set the R/W bit to 1 when data are used status registers.

As MM1495 slave address, either 91H or 93H can be selected according to the ADR terminal conditions.

When ADR terminal is L, 91H is selected.

Set the confirmation acknowledgement after the end of status register to non-acknowledgement.

The following figure shows the correspondence of the output data of status registers.

b37

b36

b35

b34

b33

b32

Input port detect

I/O3 Low I/O3 High I/O2 Low I/O2 High I/O1 Low I/O1 High

b31

b30

S detect

CINS2

CINS1

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