AP1627 データシートの表示（PDF） - Unspecified

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AP1627

Software module of M3L-bus by using HS-SSC for C16x microcontroller family.

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Software module of M3L-bus by using

HS-SSC for C16X uC family

2.3 Hardware Connection

Every device connected to the M3L-bus must have an open drain/open collector output

for both the clock (SCL) and data (SDA) lines. Each of the lines is connected to the VDD

supply via a common pull-up resistor of 3.9 KΩ in value. The I2CEN line can be

configured as a push-pull output. The connection among master and many slave's

devices is shown in figure #4. The number of devices can be connected to the M3L-bus is

limited only by the maximum bus load capacitance of 200pF.

P 3 .7

(S C L K ) P3.1 3

(M T SR ) P3.9

(M R ST ) P3.8

C 16X

uC

3.9K

3.9K

V DD

I2 C E N

SCL

SD A

M egaText

I2 C E N

SCL

SD A

Slave

Figure 4:

Hardware connection among master and slave devices

Semiconductor Group

7 of 14

AP1627 1.97

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