STSR3 データシートの表示（PDF） - STMicroelectronics

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STSR3

SYNCHRONOUS RECTIFIERS SMART DRIVER FOR FLYBACK

STMicroelectronics 

TIMING DIAGRAM

STSR3

APPLICATION INFORMATION: STSR3 IN FLYBACK CONVERTER SECONDARY SIDE

Vin

Feedback

Loop

TRANSFORMER

PWM

MosfetN

Vout

Cout

C1

100nF

+5V

+5V

D3

R3

4 Ck

R4

STSR3

C2

100nF

6

SGLGND

R1

3

SETANT

R2

option

R5

D1

D2 +5V

NOTES

1) Ceramic Capacitors C1 and C2 must be placed very close to the IC;

2) R1 and R2 set the anticipation time by partitioning the VCC voltage;

3) R3 and R4 is a resistor divider meant to provide the correct CK voltage range;

4) R5 limits the current flowing through diode D2 when Freewheeling drain voltage is high;

5) D1 could be necessary to protect INHIBIT pin from negative voltages.

6) D2 could be necessary to protect INHIBIT pin from voltages higher than VCC

7) D3 could be necessary to protect CK pin from voltages higher than VCC.

8) SGLGND layout trace must not include OUTGATE current paths.

9) A capacitor in parallel with R4 could be necessary to eliminate turn off voltage spike.

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