V55C2128164SAB10 データシートの表示（PDF） - Mosel Vitelic Corporation

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V55C2128164SAB10

128Mbit LOW-POWER SDRAM 2.5 VOLT, TSOP II / BGA PACKAGE 8M X 16

Mosel Vitelic Corporation  

MOSEL VITELIC

Low Power Mode Register Table

V55C2128164V(T/B)

BA1 BA0 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address Bus (Ax)

1*) 0*)

all have to be set to "0"

TCR

PASR

Mode Register

Self-Refresh:

Temperature-Compensated

A4 A3 Max case temp

0

0

70OC

0

1

45OC

1

0

15OC

1

1

85OC

Partial-Array Self Refresh:

A2 A1 A0 banks to be self-refreshed

0 00

all banks

0 01

1/2 array (BA1=0)

0 1 0 1/4 array (BA1=0, BA0=0)

0 11

Reserved

1 00

Reserved

1 0 1 1/8 array (BA1=BA0=0, A11=0)

1

10

1/16 array (BA1=BA0=0,

A11=A10=0)

1 11

Reserved

*)BA1 and BA0 must be 1, 0 to select the Extended Mode Register (Vs. the Mode Register)

The Low Power Mode Register must be set during the initialization sequence. Once the device is operational, the

Low Power Mode Register set can be issued anytime when the part is idle.

V55C2128164V(T/B) Rev. 1.2 August 2002

8

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