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MC44871DTB データシートの表示(PDF) - Motorola => Freescale

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コンポーネント説明
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MC44871DTB Datasheet PDF : 12 Pages
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MC44871
The Two Permissible Protocols with Five Bytes
CA_Chip Address
CO_Control Information
1
1
0
0
0
0/1
0/1
0
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 1
T14
T13
T12
T11
T10
T9
T8
ACK
BA_Band Information
FM_Frequency Information
X
X
X
B4
X
B2
B1
B0
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0
N14
N13
N12
N11
N10
N9
N8
ACK
FL_Frequency Information
N7
N6
N5
N4
N3
N2
N1
N0
ACK
CA_Chip Address
FM_Frequency Information
FL_Frequency Information
CO_Control Information
BA_Band Information
1
1
0
0
0
0/1
0/1
0
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0
N14
N13
N12
N11
N10
N9
N8
ACK
N7
N6
N5
N4
N3
N2
N1
N0
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 1
T14
T13
T12
T11
T10
T9
T8
ACK
X
X
X
B4
X
B2
B1
B0
ACK
I2C Read Mode Format
The incoming information consists of the chip address
byte in read mode (odd address). The device then answers
with an acknowledge followed by a byte containing lock and
ADC information. There is no ACK pulse sent after this byte.
1_STA CA ADC_LO
ADC_LO = ADC and Lock information
I2C Read Format
CA_Chip Address
ADC_LO
1
1
0
0
0
0/1
0/1
1
ACK
ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 1
LO
X
X
X
AD2 AD1 AD0 (no ACK)
Definition of the Bits for Test and Features
Bits B0, B1, B2: Control the PNP Band Buffers
B0, B1, B2 = 0 Buffer is “Off”, Output Low
= 1 Buffer is “On”, Output High
Bit B4: Controls the NPN Band Buffer
B4 = 0
Buffer is “Off”, Output High
=1
Buffer is “On”, Output Low
Bit T8: Controls the Operational Amplifier Output
T8
Operation
T8 = 0
Operational Amplifier Normal Operation
=1
Output State of Operational Amplifier
Switched Off
Output Pulls High through External Resistor
Bit T10, T11: Control the Reference Divider
T10 T11
Divider Ratio
0
0
512
0
1
1024
1
0
1024
1
1
512
Bit T9, T12: Control the Phase Comparator
T9
T12
Function
0
0
Upper Source Only
0
1
Lower Source Only
1
0
Normal Operation
1
1
High Impedance
8
MOTOROLA ANALOG IC DEVICE DATA

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