MM1327XD データシートの表示（PDF） - Mitsumi

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MM1327XD

Wide Discriminator

Mitsumi 

MITSUMI

Wide Discriminator MM1327

Pin no.

17

25

26

18

19

20

21

22

23

24

Pin name

NRZCLK

IR

DELAY

DATA

EDTV2

VDO

COMB-TH

LIMIT-SW

COMB-SW

NTSC/PAL

Function

Clock input pins for NRZ

discrimination

Input CLK is integrated by

resistor connected between

Pin 25 and GND and

internal 20pF, and delay is

set by Pin 26 voltage.

Data output pins

Switching pins

Internal equivalent circuit diagram

27

SEPA LEVEL NRZ discrimination

luminance signal SEPA

level adjustment pin

28

LIMIT LEVEL MAX composite output

limit level adjustment pin

Limit area:

NTSC : 42~241H

PAL : 46~291H

29

GAIN

I, Q gain adjustment pin

30

VCC

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