SY100   データシート

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8-BIT SHIFT REGISTER

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PROGRAMMABLE DELAY CHIP WITH ANALOG INPUT

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HEX D FLIP-FLOP

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3-BIT REGISTERED BUS TRANSCEIVER

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8-INPUT PECL DIFFERENTIAL MUX WITH TTL SELECTS

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SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE

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2-INPUT DIFFERENTIAL AND/NAND

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SINGLE SUPPLY QUAD PECL/TTL-TO-PECL

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(÷1, ÷2/3) OR (÷2, ÷4/6) CLOCK GENERATION CHIP