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SY100 データシート

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SY100S325_2007

LOW-POWER HEX ECL-to-TTL TRANSLATOR

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SY100E163_1998

2-BIT 8:1 MULTIPLEXER

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9-BIT ECL-TO-TTL WITH 3-STATE ENABLE

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REGISTERED HEX PECL-TO-TTL

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5-BIT DIFFERENTIAL REGISTER

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QUINT DIFFERENTIAL LINE RECEIVER

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LOW-IMPEDANCE DRIVER

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SY100S318_2007

5-WIDE 5, 4, 4, 4, 2 OA/OAI GATE

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SY100H602_1998

9-BIT LATCHED TTL-TO-ECL

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5V/3.3V ÷2, ÷4/6 CLOCK GENERATION CHIP

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