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コンポーネント説明 : Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

General Description
BR24Gxxx-3A is a serial EEPROM of I2C BUS Interface Method

Features
■ All controls available by 2 ports of serial clock(SCL) and
   serial data(SDA)
■ Other devices than EEPROM can be connected to the
   same port, saving microcontroller port
■ 1.7V to 5.5V Single Power Source Operation most
   suitable for battery use
■ 1.7V to 5.5V wide limit of operating voltage, possible
   1MHz operation
■ Page Write Mode useful for initial value write at factory
   shipment
■ Self-timed Programming Cycle
■ Low Current Consumption
■ Prevention of Write Mistake
   ➤ Write (Write Protect) Function added
   ➤ Prevention of Write Mistake at Low Voltage
■ More than 1 million write cycles
■ More than 40 years data retention
■ Noise filter built in SCL / SDA terminal
■ Initial delivery state FFh

コンポーネント説明 : HS SERIES SHELL SIZE 12-35mm TRADITIONAL CONNECTORS

Introduction
The HS series is generally called "metal connector", and is most widely used standard multi-pin circular connector.
Being sturdy and simple in construction, the HS connectors are stable mechanically and electrically and are employed by NTT and set manufacturers as standard parts.
For the performance of the HS series connectors, see the arrangement of the HS series  on pages 15-18.

コンポーネント説明 : ECONO-PAC™/OCTA-PAC® OCTA-PAC® PLUS Dual winding toroid power inductors/transformers

[EATON]

Product features
• Surface mount magnetics that can be used as single or coupled inductors or 1:1 transformers that provide isolation between two windings
• OCTA-PAC’s are designed around high frequency, low loss core material
• ECONO-PAC’s are a lower cost version of OCTAPAC’s offering high saturation flux density, Iron powder core material
• OCTA-PAC PLUS’s offer higher current ratings and higher saturation flux densities than OCTA-PAC and ECONO-PAC, Amorphous metal core material
• Secure 4 Terminal Mounting
• Inductor more versatile inductance combination by series or parallel connections

Applications
• Computer and portable power devices
• LCD panels, DVD players
• Inductor: DC-DC converters
• Buck, boost, forward, and resonant converters
• Noise filtering and filter chokes
• Transformers: 1:1 300 Vdc isolation, flyback, sepic

コンポーネント説明 : Power Inductors and Transformers

[COOPER Bussmann]

Description
• Surface mount magnetics that can be used as single or coupled inductors or 1:1 transformers that provide isolation between two windings
• ECONO-PAC’s are a lower cost version of OCTA-PAC’s
offering high saturation flux density, Powder Iron core material
• OCTA-PAC PLUS’s offer higher current ratings and higher
saturation flux densities than OCTA-PAC and ECONO-PAC,
Amorphous metal core material
• Secure 4 Terminal Mounting
• Inductor more versatile inductance combination by series or
parallel connections

Applications
• Computer and portable power devices
• LCD panels, DVD players
• Inductor: DC-DC converters
• Buck, boost, forward, and resonant converters
• Noise filtering and filter chokes
• Transformers: 1:1 300Vdc isolation, flyback, sepic

コンポーネント説明 : Serial EEPROM series Standard EEPROM I2C BUS EEPROM (2-Wire)

General Description
BR24G04-3A is a serial EEPROM of I2C BUS interface method

Features
■ All controls available by 2 ports of serial clock(SCL) and
   serial data(SDA)
■ Other devices than EEPROM can be connected to the
   same port, saving microcontroller port
■ 1.6V to 5.5V single power source action most suitable
   for battery use
■ 1MHz action is possible (1.7V to 5.5V)
■ Up to 16 bytes in page write mode
■ Self-timed programming cycle
■ Low current consumption
■ Prevention of write mistake
   ➤ Write (write protect) function added
   ➤ Prevention of write mistake at low voltage
■ More than 1 million write cycles
■ More than 40 years data retention
■ Noise filter built in SCL / SDA terminal
■ Initial delivery state FFh

コンポーネント説明 : Half-pitch Board-to-Board Connectors

Screw Mount Eliminated to Save Space.
Adjustable Stacking Height of 12 to 20 mm.

• The stacking height can be adjusted in 1-mm increments.
• Mating length of 3.1 mm and a pitch of 1.27 mm for highdensity mounting in double-row arrangements.
• All models incorporate fastening pins to secure the terminals, thus preventing floating or falling over during soldering.
• Leaf contact construction enables smooth mating and resistance to bending.
• The XH3 conforms to EN, IEC, UL (file no. E103202), and CSA (file no. LR62678).

コンポーネント説明 : EMI/RFI Banding and Shrink Boot Adapter

EMI/RFI Banding and Shrink Boot Adapter
Direct Coupling - Standard Profile

コンポーネント説明 : Dual “J-K” Flip-Flop with Set and Reset

Description
The CD54AC109/3A and CD54ACT109/3A are dual “J-K” flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The CD54AC109/3A and CD54ACT109/3A changes state on the positive-going transition of the clock. Set and Reset are accomplished asynchronously by low-level inputs.
The CD54AC109/3A and CD54ACT109/3A are supplied in 16 lead dual-in-line ceramic packages (F suffix).

コンポーネント説明 : SHARC Processors

GENERAL DESCRIPTION
The ADSP-21367/ADSP-21368/ADSP-21369 SHARC processors are members of the SIMD SHARC family of DSPs that feature Analog Devices’ Super Harvard Architecture. These processors are source code-compatible with the ADSP-2126x and ADSP-2116x DSPs as well as with first generation ADSP-2106x SHARC processors in SISD (single-instruction, single-data) mode. The processors are 32-bit/40-bit floating point processors optimized for high performance automotive audio applications with its large on-chip SRAM, and mask-programmable ROM, multiple internal buses to eliminate I/O bottlenecks, and an innovative digital audio interface (DAI).

SUMMARY
   High performance 32-bit/40-bit floating point processor
      optimized for high performance audio processing
   Single-instruction, multiple-data (SIMD) computational
      architecture
   On-chip memory—2M bit of on-chip SRAM and 6M bit of
      on-chip mask programmable ROM
   Code compatible with all other members of the SHARC family
   The ADSP-21367/ADSP-21368/ADSP-21369 are available
      with a 333 MHz core instruction rate with unique audiocentric
      peripherals such as the digital audio interface, S/PDIF
      transceiver, serial ports, 8-channel asynchronous sample
      rate converter, precision clock generators, and more. For
      complete ordering information, see Ordering Guide on
      Page 56.

コンポーネント説明 : 3-to-8-Line Decoder/Demultiplexer Inverting

Description
The CD54AC138/3A and CD54ACT138/3A are 3-to-8-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology.
The CD54AC138/3A and CD54ACT138/3A are supplied in 16 lead dual-in-line ceramic packages (F suffix).

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