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AD660(2008) データシートの表示(PDF) - Analog Devices

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AD660
(Rev.:2008)
ADI
Analog Devices ADI
AD660 Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
BIPOLAR CONFIGURATION
The circuit shown in Figure 10 provides a bipolar output voltage
from −10.000000 V to +9.999694 V with positive full scale occur-
ring with all bits on. As in the unipolar mode, Resistor R1 and
Resistor R2 can be eliminated altogether to provide AD660 bipolar
operation without any external components. Eliminating these
resistors increases the gain error by 0.50% of FSR in bipolar mode.
R2
50
DB0/
LBE/
DB8/ DB1/DB9/ DB7/
CLEAR SELECT CS SIN DATADIR DB15
15
14 12
11
5
HBE 16
SER 17
CLR 18
CONTROL
LOGIC
LDAC 19
REF IN
23
R1
10k
50
10V REF
16-BIT LATCH
16-BIT LATCH
16-BIT DAC
AD660
10k
10.05k
SOUT
13
22
SPAN/
BIPOLAR
OFFSET
VOUT
21
OUTPUT
20 AGND
24
REF OUT
1
–VEE
2
3
4
+VCC +VLL
DGND
Figure 10. ±10 V Bipolar Voltage Output
Gain offset and bipolar zero errors can be adjusted to zero using
the circuit shown in Figure 11 as follows:
1. Offset adjust.
Turn off all bits. Adjust the trimmer, R2, to give 10.000000 V
output.
2. Gain adjust.
Turn all bits on and adjust R1 to give a reading of 9.999694 V.
3. Bipolar zero adjust (optional).
In applications where an accurate zero output is required, set
the MSB on, all other bits off, and readjust R2 for 0 V output.
AD660
R2
100
DB0/
LBE/
DB8/ DB1/DB9/ DB7/
CLEAR SELECT CS SIN DATADIR DB15
15
14 12
11
5
HBE 16
SER 17
CLR 18
CONTROL
LOGIC
LDAC 19
REF IN
23
R1
10k
50
10V REF
16-BIT LATCH
16-BIT LATCH
16-BIT DAC
AD660
10k
10.05k
13 SOUT
22
SPAN/
BIPOLAR
OFFSET
VOUT
21
OUTPUT
20 AGND
24
REF OUT
1
–VEE
2
3
4
+VCC +VLL
DGND
Figure 11. ±10 V Bipolar Voltage Output with Gain and Offset Adjustment
Note that using external resistors introduces a small temperature
drift component beyond that inherent in the AD660. The inter-
nal resistors are trimmed to ratio-match and temperature-track
other resistors on-chip, even though their absolute tolerances are
±20% and absolute temperature coefficients are approximately
−50 ppm/°C. In the case that external resistors are used, the
temperature coefficient mismatch between internal and external
resistors, multiplied by the sensitivity of the circuit to variations
in the external resistor value, is the resultant additional tempera-
ture drift.
INTERNAL/EXTERNAL REFERENCE USE
The AD660 has an internal low noise buried Zener diode
reference that is trimmed for absolute accuracy and temperature
coefficient. This reference is buffered and optimized for use in a
high speed DAC and gives long-term stability equal or superior to
the best discrete Zener diode references. The performance of
the AD660 is specified with the internal reference driving the
DAC and with the DAC alone (for use with a precision external
reference).
The internal reference has sufficient buffering to drive external
circuitry in addition to the reference currents required for the
DAC (typically 1 mA to REF IN and 1 mA to SPAN/BIPOLAR
OFFSET). A minimum of 2 mA is available for driving external
loads. The AD660 reference output should be buffered with an
external op amp if it is required to supply more than 4 mA total
current. The reference is tested and guaranteed to ±0.2%
maximum error.
Rev. B | Page 11 of 20

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