BR24G1MNUX-3AE2(2013) データシートの表示（PDF） - ROHM Semiconductor

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BR24G1MNUX-3AE2
(Rev.:2013)

Serial EEPROM Series Standard EEPROM I2C BUS EEPROM (2-Wire)

ROHM Semiconductor 

BR24Gxxx-3A (128K 256K 1M)

Datasheet

Read Command

1. Read Cycle

Read cycle is when data of EEPROM is read. Read cycle could be random read cycle or current read cycle. Random

read cycle is a command to read data by designating a specific address, and is used generally. Current read cycle is a

command to read data of internal address register without designating an address, and is used when to verify just after

write cycle. In both the read cycles, sequential read cycle is available where the next address data can be read in

succession.

SDA

LINE

S

W

T

R

A

R

T

SLAVE

ADDRESS

I

T

E

1st WORD

ADDRESS（ｎ）

1 0 1 0 A2A1A0

WAWA

15 14

2nd WORD

ADDRESS（ｎ）

WA

0

S

T

R

A

R

T

SLAVE

ADDRESS

E

A

D

1 0 1 0 A2A1A0

DATA(n)

D7

D0

S

T

O

P

(1) As for WA14, BR24G128-3A become don’t care.

As for WA15, BR24G128/256-3A become don’t care.

RA

Note) / C

(1)

A

C

A

RA

C

/C

A

C

WK

K

K

WK

K

Figure 41. Random Read Cycle

SDA

L IN E

S

T

R

A

E

R

SLAVE

A

T ADDRESS D

S

T

O

D A T A (n )

P

1 0 1 0 A 2A 1A 0

D7

D0

RA

A

Note)

/C

WK

C

K

Figure 42. Current Read Cycle

S

T

A

R

T

SLAVE

ADDRESS

R

E

A

D

DATA(n)

SDA

LINE

1 0 1 0 A2 A1A0

D7

D0

S

T

DATA(n+x)

O

P

D7

D0

RA

A

A

A

Note）

/C

WK

C

K

C

K

C

K

Figure 43. Sequential Read Cycle (in the case of current read cycle)

(1) In random read cycle, data of designated word address can be read.

(2) When the command just before current read cycle is random read cycle, current read cycle (each including

sequential read cycle), data of incremented last read address (n)-th, i.e., data of the (n+1)-th address is output.

(3) When ACK signal 'LOW' after D0 is detected, and stop condition is not sent from master (μ-COM) side, the next

address data can be read in succession.

(4) Read cycle is ended by stop condition where 'H' is input to ACK signal after D0 and SDA signal goes from ‘L’ to

‘H’ while at SCL signal is ‘H’.

(5) When 'H' is not input to ACK signal after D0, sequential read gets in, and the next data is output.

Therefore, read command cycle cannot be ended. To end read command cycle, be sure to input 'H' to ACK signal

after D0, and the stop condition where SDA goes from ‘L’ to ‘H’ while SCL signal is 'H'.

(6) Sequential read is ended by stop condition where 'H' is input to ACK signal after arbitrary D0 and SDA is asserted

from ‘L’ to ‘H’ while SCL signal is 'H'.

Note)

(1)

(1) In BR24G1M-3A, A0 becomes P0.

1 0 1 0 A2A1A0

Figure 44. Difference of Slave Address of Each Type

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TSZ02201-0R2R0G100020-1-2

25.Feb.2013 Rev.002

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