PI6C184 データシートの表示（PDF） - Pericom Semiconductor
部品番号
コンポーネント説明
一致するリスト
PI6C184 Datasheet PDF : 7 Pages
| |||
PI6C184
111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222333444555666777888999000111222333444555666777888999000111222111222333444555666777888999000111222
Precision 1-13 Clock Buffer
Product Features
• High speed, low noise non-inverting 1-13 buffer
• Supports up to four SDRAM DIMMs
• Low skew (< 250ps) between any two output clocks
• I2C Serial Configuration interface
• Multiple VDD, VSS pins for noise reduction
• 3.3V power supply voltage
• Separate Hi-Z pin for testing
• 28-pin SSOP and SOIC packages (H, S)
Description
The PI6C184 is a high-speed low-noise 1-13 non-inverting
buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C104 clock generator
for Intel Architecture for both desktop and mobile systems.
At power up all SDRAM output are enabled and active. The I2C
Serial control may be used to individually activate/deactivate any
of the 13 output drivers.
Note:
Purchase of I2C components from Pericom conveys a license to
use them in an I2C system as defined by Philips.
Block Diagram
Pin Configuration
BUF_IN
SDATA
I2C
SCLK
I/O
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM12
VDD 1
SDRAM0 2
SDRAM1 3
VSS 4
VDD 5
SDRAM2 6
SDRAM3 7
VSS 8
BUF_IN 9
28-Pin
H, S
SDRAM4 10
SDRAM5 11
SDRAM12 12
VDD 13
SDATA 14
28 VDD
27 SDRAM11
26 SDRAM10
25 VSS
24 VDD
23 SDRAM9
22 SDRAM8
21 VSS
20 VDD
19 SDRAM7
18 SDRAM6
17 VSS
16 VSS
15 SCLK
1
PS8320A 10/14/02
Share Link: 