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PI6C180 データシートの表示(PDF) - Pericom Semiconductor

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PI6C180
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI6C180 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
PI6C180
Precision 1-18 Clock Buffer
Features
High-speed, to 100 MHz
Low-noise non-inverting 1-18 buffer
Supports up to four SDRAM DIMMs
Low skew (< 250ps) between any two output clocks
I2C Serial Configuration interface
Multiple VDD, VSS pins for noise reduction
3.3V power supply voltage
Separate Hi-Z pin for testing
Packaging:
- 48-pin SSOP (V)
Block Diagram
SDRAM0
BUF_IN
SDRAM1
SDRAM2
SDRAM3
OE
SDATA
I2C
SCLOCK
I/O
SDRAM17
Description
The PI6C180, a high-speed low-noise 1-18 non-inverting buffer
designed for SDRAM clock buffer applications operates up to
100 MHz.
At power up all SDRAM output are enabled and active. The I2C
Serial control may be used to individually activate/deactivate any
of the 18 output drivers.
The output enable (OE) pin may be pulled low to put all outputs
in a Hi-Z state.
Note:
Purchase of I2C components from Pericom conveys a license to
use them in an I2C system as defined by Philips.
Pin Configuration
NC 1
NC 2
VDD0 3
SDRAM0 4
SDRAM1 5
VSS0 6
VDD1 7
SDRAM2 8
SDRAM3 9
VSS1 10
BUF_IN 11
VDD2 12
SDRAM4 13
SDRAM5 14
VSS2 15
VDD3 16
SDRAM6 17
SDRAM7 18
VSS3 19
VDD4 20
SDRAM16 21
VSS4 22
VDDIIC 23
SDATA 24
48 NC
47 NC
46 VDD9
45 SDRAM15
44 SDRAM14
43 VSS9
42 VDD8
41 SDRAM13
40 SDRAM12
39 VSS8
38 OE
37 VDD7
36 SDRAM11
35 SDRAM10
34 VSS7
33 VDD6
32 SDRAM9
31 SDRAM8
30 VSS6
29 VDD5
28 SDRAM17
27 VSS5
26 VSSIIC
25 SCLOCK
1
PS8141F
12/13/04

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