M40Z111WMH6 データシートの表示（PDF） - STMicroelectronics

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M40Z111WMH6

5V OR 3V NVRAM SUPERVISOR FOR UP TO TWO LPSRAMs

STMicroelectronics 

M40Z111, M40Z111W

Figure 4. Hardware Hookup

3.0, 3.3, or 5V

1N5817 or

MBR5120T3

0.1µF

Thereshold

VCC

VOUT

0.1µF

M40Z111/W

ECON

E

THS

VSS

VCC

E2

CMOS

SRAM

E

x8 or x16

AI02394

MAXIMUM RATING

Stressing the device above the rating listed in the

“Absolute Maximum Ratings” table may cause

permanent damage to the device. These are

stress ratings only and operation of the device at

these or any other conditions above those indicat-

ed in the Operating sections of this specification is

not implied. Exposure to Absolute Maximum Rat-

ing conditions for extended periods may affect de-

vice reliability. Refer also to the

STMicroelectronics SURE Program and other rel-

evant quality documents.

Table 2. Absolute Maximum Ratings

Symbol

Parameter

Value

Unit

TA

Ambient Operating Temperature

Grade 6

–40 to 85

°C

TSTG

Storage Temperature (VCC Off)

SNAPHAT®

–40 to 85

°C

SOIC

–55 to 125

°C

TSLD(1)

Lead Solder Temperature for 10 seconds

260

°C

VIO

Input or Output Voltages

–0.3 to VCC +0.3

V

Supply Voltage

VCC

M40Z111

–0.3 to 7.0

V

M40Z111W

–0.3 to 4.6

V

IO

Output Current

20

mA

PD

Power Dissipation

1

W

Note: 1. Reflow at peak temperature of 215°C to 225°C for < 60 seconds (total thermal budget not to exceed 180°C for between 90 to 120

seconds).

CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.

CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.

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