UPD78064YGF-XXX-3BA(1992) データシートの表示（PDF） - NEC => Renesas Technology

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UPD78064YGF-XXX-3BA
(Rev.:1992)

8-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

mPD78062Y,78063Y,78064Y

5.2 CLOCK GENERATOR

There are two kinds of clocks, main system clock and subsystem clock.

The instruction execution time can also be changed.

Ý 0.4 ms/0.8 ms/1.6 ms/3.2 ms/6.4 ms/12.8 ms (main system clock: at 5.0 MHz operation)

Ý 122 ms (subsystem clock: at 32.768 kHz operation)

Fig. 5-1 Clock Generator Block Diagram

H

XT1/P07

XT2

X1

X2

Subsystem fXT

Clock

Oscillator

Main

System

Clock

Oscillator

STOP

fX

Selec-

tor

Scaler

fX

2

Prescaler

Prescaler

fXX

fXX fXX fXX fXX fXT

2 22 23 24

Selec-

tor

Standby

Control

Circuit

Watch Timer,

Clock Output Function

4 Clock to

Peripheral

Hardware

CPU

Clock

(fCPU)

To INTP0

Sampling Clock

5.3 TIMER/EVENT COUNTER

Five timer/event counter channels are incorporated.

Ý 16-bit timer/event counter : 1 channel

Ý 8-bit timer/event counter : 2 channels

Ý Watch timer

: 1 channel

Ý Watchdog timer

: 1 channel

Table 5-2 Timer/Event Counter Types and Functions

Type

Function

Interval timer

External event counter

Timer output

PWM output

Pulse width measurement

Square wave output

One-shot pulse output

Interrupt request

16-bit Timer/

Event Counter

1 channel

1 channel

1 output

1 output

1 input

1 output

1 output

2

8-bit Timer/

Event Counter

2 channels

2 channels

2 outputs

–

–

2 outputs

–

2

Watch Timer

1 channel

–

–

–

–

–

–

2

Watchdog Timer

1 channel

–

–

–

–

–

–

1

19

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