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V437216C04VDTG-10PC データシートの表示(PDF) - Mosel Vitelic Corporation

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コンポーネント説明
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V437216C04VDTG-10PC
Mosel-Vitelic
Mosel Vitelic Corporation  Mosel-Vitelic
V437216C04VDTG-10PC Datasheet PDF : 12 Pages
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MOSEL VITELIC
V437216C04VDTG-10PC
Serial Presence Detect Information
A serial presence detect storage device
E2PROM is assembled onto the module. Informa-
tion about the module configuration, speed, etc. is
SPD-Table for -10PC modules:
written into the E2PROM device during module pro-
duction using a serial presence detect protocol (I2C
synchronous 2-wire bus)
Byte Number Function Described
0
Number of SPD bytes
1
Total bytes in Serial PD
2
Memory Type
3
Number of Row Addresses (without BS bits)
4
Number of Column Addresses (for x4 SDRAM)
5
Number of DIMM Banks
6
Module Data Width
7
Module Data Width (continued)
8
Module Interface Levels
9
SDRAM Cycle Time at CL=3
10
SDRAM Access Time from Clock at CL=3
11
Dimm Config (Error Det/Corr.)
12
Refresh Rate/Type
13
SDRAM width, Primary
14
Error Checking SDRAM Data Width
15
Minimum Clock Delay from Back to Back Random
Column Address
16
Burst Length Supported
17
Number of SDRAM Banks
18
Supported CAS Latencies
19
CS Latencies
20
WE Latencies
21
SDRAM DIMM Module Attributes
22
SDRAM Device Attributes: General
23
Minimum Clock Cycle Time at CAS Latency = 2
24
Maximum Data Access Time from Clock for CL = 2
25
Minimum Clock Cycle Time at CL = 1
26
Maximum Data Access Time from Clock at CL = 1
27
Minimum Row Precharge Time
28
Minimum Row Active to Row Active Delay tRRD
29
Minimum RAS to CAS Delay tRCD
30
Minimum RAS Pulse Width tRAS
SPD Entry Value
128
256
SDRAM
12
10
1
72
0
LVTTL
10.0 ns
6.0 ns
ECC
Self-Refresh, 15.8µs
x4
x4
tccd = 1 CLK
1, 2, 4, 8, full page
4
CL = 2, 3
CS Latency = 0
WL = 0
Registered/Buffered
Vcc tol ± 10%
10.0 ns
6.0 ns
Not Supported
Not Supported
20 ns
16 ns
20 ns
45 ns
Hex Value
16Mx72
80
08
04
0C
0A
01
48
00
01
A0
60
02
80
04
04
01
8F
04
06
01
01
1F
0E
A0
60
00
00
14
10
14
2D
V437216C04VDTG-10PC Rev. 1.3 July 2001
4

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