DS21Q41B データシートの表示（PDF） - Maxim Integrated

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DS21Q41B

Quad T1 Framer

Maxim Integrated 

DS21Q41B

1.0 INTRODUCTION

The DS21Q41B Quad T1 Framer is made up of five main parts: framer #0, framer #1, framer #2, framer

#3, and the control port which is shared by all four framers. See the Block Diagram in Figure 1-1. Each

of the four framers within the DS21Q41B maintain the same register structure that appeared in the

DS2141A. The two framer select inputs (FS0 and FS1) are used to determine which framer within the

DS21Q41B is being accessed. In this manner, software written for the DS2141A can also be used with

only slight modifications, in the DS21Q41B.

Several new features have been added to the framers in the DS21Q41B over the DS2141A. Below is short

list of the new features. More details can be found in Sections 2 through 12.

ADDED FEATURE

Non-multiplexed parallel control port operation

ANSI ones density monitor (transmit and receive sides) and enforcer (transmit side only)

CSU loop code generator

Elastic store reset and minimum delay mode

Divide RSYNC output by two for D4 to ESF conversion applications

TCLK keep alive

Indications of transmit side elastic store slip direction

Ability to decouple the receive and transmit elastic stores

Counting of excessive 0s (EXZs)

SECTION

2

3 and 4

3

3 and 10

3

3

4

10

5

2 of 61

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