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MC74HCT157A
EXPANDED LOGIC DIAGRAM
2
A0
3
B0
A1 5
NIBBLE
INPUTS
B1 6
11
A2
10
B2
14
A3
13
B3
OUTPUT ENABLE
SELECT
4 Y0
7
Y1
9 Y2
DATA
OUTPUTS
12 Y3
SWITCHING WAVEFORMS
INPUT A OR B
tPLH
OUTPUT Y
tr
2.7 V
1.3 V
0.3 V
90%
1.3 V
10%
tTLH
tf
3V
GND
tPHL
tTHL
Figure 1.
tr
SELECT
tPLH
OUTPUT Y
2.7 V
1.3 V
0.3 V
90%
1.3 V
10%
tTLH
Figure 2.
tf
3V
GND
tPHL
tTHL
tr
OUTPUT ENABLE
tPHL
OUTPUT Y
2.7 V
1.3 V
0.3 V
90%
1.3 V
10%
tTHL
Figure 3.
tf
VCC
GND
tPLH
tTLH
DEVICE
UNDER
TEST
TEST POINT
OUTPUT
CL*
* Includes all probe and jig capacitance
Figure 4. Test Circuit
MOTOROLA
4
High–Speed CMOS Logic Data
DL129 — Rev 6