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MWCT1001AVLH データシートの表示(PDF) - NXP Semiconductors.

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MWCT1001AVLH
NXP
NXP Semiconductors. NXP
MWCT1001AVLH Datasheet PDF : 857 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Section number
Title
Page
2.3.7.5 Analog Modules......................................................................................................................... 54
2.3.7.6 Communication Interfaces......................................................................................................... 55
2.3.7.7 Power Management....................................................................................................................56
Chapter 3
Chip Configuration
3.1 Introduction...................................................................................................................................................................57
3.2 Core modules................................................................................................................................................................ 57
3.2.1 Core Configuration........................................................................................................................................ 57
3.3 System modules............................................................................................................................................................ 58
3.3.1 System Integration Module (SIM) Configuration..........................................................................................58
3.3.2 MCM Configuration...................................................................................................................................... 59
3.3.3 Inter-Peripheral Crossbar Switch (XBAR) and AND/OR/INVERT (AOI) Configuration........................... 60
3.3.3.1 Number of inputs and outputs.................................................................................................... 60
3.3.3.2 XBARA and XBARB Inputs..................................................................................................... 60
3.3.3.3 XBAR Interconnections............................................................................................................. 61
3.3.3.4 XBARA Outputs........................................................................................................................ 62
3.3.3.5 AOI module register write protection........................................................................................ 63
3.3.4 Interrupt Controller (INTC) Configuration....................................................................................................64
3.3.4.1 Reset/Interrupt Vector Table......................................................................................................64
3.3.5 DMA Controller Configuration..................................................................................................................... 72
3.3.5.1 DMA channel assignments........................................................................................................ 73
3.3.6 Power Management Controller (PMC) Configuration...................................................................................74
3.4 Clock Modules.............................................................................................................................................................. 75
3.4.1 On-Chip Clock Synthesis (OCCS) Configuration......................................................................................... 75
3.5 Memories and Memory Interfaces................................................................................................................................ 75
3.5.1 Flash Memory Controller (FMC) Configuration........................................................................................... 75
3.5.2 Flash Memory Configuration.........................................................................................................................76
3.5.2.1 FTFL_FOPT Register................................................................................................................ 77
3.6 Security and Integrity....................................................................................................................................................77
MWCT1xxx Reference Manual, Rev. 3.1, 09/2016
4
NXP Semiconductors

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