LT1302/LT1302-5
PI FU CTIO S
SW (Pin 7): Switch Pin. Connect inductor and diode here.
Keep layout short and direct.
PGND (Pin 8): Power Ground. Pins 8 and 1 should be
connected under the package. In the SO package, pins 1
and 8 are thermally connected to the die. One square inch
of PCB copper provides an adequate heat sink for the
device.
BLOCK DIAGRA SM
VIN
+
C1
C5
100pF
1.24V
REFERENCE
R1
FB
4
R2
SHDN
3
SHUTDOWN
L1
6
VIN
C2
0.1µF
36mV
+
–
VOS
15mV
CMP1
ENABLE
OFF
220kHz
OSCILLATOR
HYSTERETIC
COMPARATOR 2µA
VIN
Q5
–
A1
+
ERROR
AMPLIFIER
A2
R5
730Ω
A3
DRIVER
VIN
Q1 Q2
BIAS
300Ω 3.6k
D1
+
VOUT
C3
7
SW
R4
1.75Ω
Q3
Q4
160X
GND
1
2 VC
R3
22k
C4
0.01µF
5 IT
PGND
8
1302 F02
Figure 2. LT1302 Block Diagram
5