CY7C4265-15AXC データシートの表示（PDF） - Cypress Semiconductor
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CY7C4265-15AXC Datasheet PDF : 23 Pages
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CY7C4255, CY7C4265, CY7C4265A
Figure 2. AC Test Loads and Waveforms[10, 11]
5V
OUTPUT
R1 1.1 KΩ
CL
INCLUDING
JIG AND
SCOPE
R2
680Ω
3.0V
GND
≤ 3 ns
ALL INPUT PULSES
90%
10%
90%
10%
≤ 3 ns
Equivalent to:
THÉVENIN EQUIVALENT
410Ω
OUTPUT
1.91V
Switching Characteristics Over the Operating Range
Parameter
Description
7C42X5-10
Min Max
tS
Clock Cycle Frequency
100
tA
Data Access Time
2
8
tCLK
Clock Cycle Time
10
tCLKH
Clock HIGH Time
4.5
tCLKL
Clock LOW Time
4.5
tDS
Data Set Up Time
3
tDH
Data Hold Time
0.5
tENS
Enable Set Up Time
3
tENH
Enable Hold Time
0.5
tRS
Reset Pulse Width[12]
10
tRSR
Reset Recovery Time
8
tRSF
Reset to Flag and Output Time
10
tPRT
Retransmit Pulse Width
30
tRTR
Retransmit Recovery Time
60
tOLZ
Output Enable to Output in Low Z[12]
0
tOE
tOHZ
Output Enable to Output Valid
Output Enable to Output in High Z[13]
3
7
3
7
tWFF
Write Clock to Full Flag
8
tREF
Read Clock to Empty Flag
8
tPAFasynch Clock to Programmable Almost-Full Flag[13]
12
(Asynchronous mode, VCC/SMODE tied to VCC)
tPAFsynch Clock to Programmable Almost-Full Flag
8
(Synchronous mode, VCC/SMODE tied to VSS)
tPAEasynch Clock to Programmable Almost-Empty Flag[14]
12
(Asynchronous mode, VCC/SMODE tied to VCC)
tPAEsynch Clock to Programmable Almost-Full Flag
8
(Synchronous mode, VCC/SMODE tied to VSS)
tHF
Clock to Half-Full Flag
12
tXO
Clock to Expansion Out
6
7C42X5,
7C4265A-15
Min Max
66.7
2 10
15
6
6
4
1
4
1
15
10
15
35
65
0
3
8
3
8
10
10
16
10
16
10
16
10
7C42X5-25
Min Max
40
2 15
25
10
10
6
1
6
1
25
15
25
45
75
0
3 12
3 12
15
15
20
15
20
15
20
15
7C42X5-35
Min Max
28.6
2 20
35
14
14
7
2
7
2
35
20
35
55
85
0
3 15
3 15
20
20
25
20
25
20
25
20
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Document #: 38-06004 Rev. *E
Page 5 of 23
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