CY7C194BN-25VC データシートの表示（PDF） - Cypress Semiconductor
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CY7C194BN-25VC Datasheet PDF : 10 Pages
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CY7C194BN
256 Kb (64K x 4) Static RAM
Features
• Fast access time: 15 ns and 25 ns
• Wide voltage range: 5.0V ± 10% (4.5V to 5.5V)
• CMOS for optimum speed/power
• TTL-compatible inputs and outputs
• CY7C194BN is available in 24 DIP, 24 SOJ packages.
General Description [1]
The CY7C194BN is a high-performance CMOS
Asynchronous SRAM organized as 64K × 4 bits that supports
an asynchronous memory interface. The device features an
automatic power-down feature that significantly reduces
power consumption when deselected.
See the Truth Table in this data sheet for a complete
description of read and write modes.
The CY7C194BN is available in 24 DIP, 24 SOJ package(s).
Logic Block Diagram
Input Buffer
RAM Array
Column Decoder
I/Ox
Power
Down
Circuit
X
CE
WE
OE
(7C195 only)
A
X
Product Portfolio
-15
-25
Maximum Access Time
15
25
Maximum Operating Current
80
80
Maximum CMOS Standby Current
10
10
Notes:
1. For best-practice recommendations, please refer to the Cypress application note System Design Guidelines on www.cypress.com.
Unit
ns
mA
mA
Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600
Document #: 001-06446 Rev. **
Revised February 1, 2006
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