NJW1142AV データシートの表示（PDF） - Japan Radio Corporation
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NJW1142AV Datasheet PDF : 21 Pages
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NJW1142A
DEFINITION OF I2C REGISTER
♦ I2C BUS FORMAT
MSB
LSB
MSB
LSB
S Slave Address A Select Address
MSB
A
1bit
8bit
1bit
8bit
1bit
Data
8bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
♦ SLAVE ADDRESS
MSB
LSB
1
0
0
0
0
0
1 R/W
LSB
AP
1bit 1bit
R/W=0: Write mode for register setting
R/W=1: Not available
♦ CONTROL REGISTER TABLE
The select address sets each function (Volume, Balance, AGC, Surround, Tone Control, AUX).
The auto increment function cycles the select address as follows.
00H¡01H¡02H¡03H¡04H¡05H¡00H
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
VOL
01H
CHS
BAL
SUR1
SUR0
02H
BCB
BASS
BCSB
SUB-BASS
03H
BCT
TREB
BCST
SUB-TREB
04H
Don’t Care
05H
OUT
SEL
AGC1
AGC0
AGC
Don’t Care
♦ CONTROL REGISTER DEFAULT VALUE
Control register default value is all “0”.
Select
BIT
Address
D7
D6
D5
D4
D3
D2
D1
D0
00H
0
0
0
0
0
0
0
0
01H
0
0
0
0
0
0
0
0
02H
0
0
0
0
0
0
0
0
03H
0
0
0
0
0
0
0
0
04H
0
0
0
0
0
0
0
0
05H
0
0
0
0
0
0
0
0
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