AD7265ACP データシートの表示（PDF） - Analog Devices
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AD7265ACP Datasheet PDF : 16 Pages
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AD7265
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Preliminary Technical Data
DGND 1
REF SELECT 2
AVDD 3
DCAPA 4
AGND 5
AGND 6
VA1 7
VA2 8
PIN 1
IDENTIFIER
AD7265
TOP VIEW
(Not to Scale)
24 A1
23 A2
22 SGL/,1..
21 RANGE
20 DCAPB
19 AGND
18 VB1
17 VB2
Figure 2. AD7265 Pin Configuration
Table 4. AD7265 Pin Function Descriptions
Pin No. Mnemonic Description
4, 20
DCAPA,
DCAPB
Decoupling capacitors are connected to these pins to decouple the reference buffer for each respective ADC.. The
on-chip reference can be taken from these pins and applied externally to the rest of a system. The range of the
external reference is dependent on the analog input range selected. See the Reference Configuration Options
section.
7–12
VA1–VA6
Analog Inputs of ADC A. These may be programmed as six single-ended channels or three true differential analog
input channel pairs. See Table 6.
18–13 VB1–VB6
Analog Inputs of ADC B. These may be programmed as six single-ended channels or three true differential analog
input channel pairs. See Table 6.
27
SCLK
Serial Clock. Logic Input. A serial clock input provides the SCLK for accessing the data from the AD7265. This clock
is also used as the clock source for the conversion process.
5, 6, 19 AGND
Analog Ground. Ground reference point for all analog circuitry on the AD7265. All analog input signals and any
external reference signal should be referred to this AGND voltage. All three of these AGND pins should connect to
the AGND plane of a system. The AGND and DGND voltages ideally should be at the same potential and must not
be more than 0.3 V apart, even on a transient basis.
32
DVDD
Digital Supply Voltage, 2.7 V to 5.25 V. This is the supply voltage for all digital circuitry on the AD7265. The DVDD
and AVDD voltages should ideally be at the same potential and must not be more than 0.3 V apart even on a
transient basis. This supply should be decoupled to DGND.
31
VDRIVE
Logic power supply input. The voltage supplied at this pin determines at what voltage the interface will operate.
This pin should be decoupled to DGND. The voltage at this pin may be different to that at AVDD and DVDD but
should never exceed either by more than 0.3 V.
1, 29
DGND
Digital Ground. This is the ground reference point for all digital circuitry on the AD7265. Both DGND pins should
connect to the DGND plane of a system. The DGND and AGND voltages should ideally be at the same potential
and must not be more than 0.3 V apart, even on a transient basis.
3
AVDD
Analog Supply Voltage, 2.7 V to 5.25 V. This is the only supply voltage for all analog circuitry on the AD7265. The
AVDD and DVDD voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a
transient basis. This supply should be decoupled to AGND.
26
CS
Chip Select. Active low logic input. This input provides the dual function of initiating conversions on the AD7265
and frames the serial data transfer.
30, 28
DOUTA,
DOUTB
Serial Data Outputs. The data output is supplied to this pin as a serial data stream. The bits are clocked out on the
falling edge of the SCLK input and 14 SCLKs are required to access the data. The data appears on both pins
simultaneously from the simultaneous conversions of both ADCs. The data stream consists of one leading zero
followed by one identification bit, followed by the 12 bits of conversion data. The data is provided MSB first. If CS
is held low for 16 SCLK cycles rather than 14, then two trailing zeros will appear after the 12 bits of data. If CS is
held low for a further 16 SCLK cycles after this on either DOUTA or DOUTB, the data from the other ADC follows on
the DOUT pin. This allows data from a simultaneous conversion on both ADCs to be gathered in serial format on
either DOUTA or DOUTB alone using only one serial port. See the Serial Interface section.
Rev. PrA | Page 6 of 16
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