EL7515 データシートの表示（PDF） - Renesas Electronics

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EL7515

High Frequency PWM Step-Up Regulator

Renesas Electronics 

EL7515

The boost converter output voltage is determined by the

relationship in Equation 8:

VOUT

=

VFB





1



+

RR-----21-

(EQ. 8)

where VFB slightly changes with VDD. The curve is shown in

this data sheet.

RC Filter

The maximum voltage rating for the VDD pin is 12V and is

recommended to be about 10V for maximum efficiency to

drive the internal MOSFET. The series resistor R4 in the RC

filter connected to VDD can be utilized to reduce the voltage.

If VO is larger than 10V, then Equation 9 shows:

R4

=

V-----O-----–-----1---0--

IDD

(EQ. 9)

where IDD is shown in IDD vs fS curve. Otherwise, R4 can be

10 to 51 with C4 = 0.1µF.

Thermal Performance

The EL7515 uses a fused-lead package, which has a

reduced JA of +100°C/W on a four-layer board and

+115°C/W on a two-layer board. Maximizing copper around

the ground pins will improve the thermal performance.

This chip also has internal thermal shut-down set at around

+135°C to protect the component.

Layout Considerations

The layout is very important for the converter to function

properly. Power Ground ( ) and Signal Ground ( ) should

be separated to ensure that the high pulse current in the

Power Ground never interferes with the sensitive signals

connected to Signal Ground. They should only be connected

at one point.

The trace connected to pin 8 (FB) is the most sensitive trace.

It needs to be as short as possible and in a “quiet” place,

preferably between PGND or SGND traces.

In addition, the bypass capacitor connected to the VDD pin

needs to be as close to the pin as possible.

The heat of the chip is mainly dissipated through the SGND

pin. Maximizing the copper area around it is preferable. In

addition, a solid ground plane is always helpful for the EMI

performance.

The demo board is a good example of layout based on these

principles. Please refer to the EL7515 Application Brief for

the layout. http://www.intersil.com/data/tb/tb429.pdf

FN7120 Rev 2.00

August 10, 2007

Page 8 of 9

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