CDB5364 データシートの表示（PDF） - Cirrus Logic
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CDB5364 Datasheet PDF : 24 Pages
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CDB5364
In TDM mode, SDOUT_SEL1 and SDOUT_SEL 0 extract two stereo pairs from the CS5364 TDM stream,
convert the data to Left-Justified PCM format and send the data to the CS8406 data input pin.
0x00 TDM Pair 1 (Channel 1, 2)
0x01 TDM Pair 2 (Channel 3, 4)
0x1x Reserved
In PCM mode, SDOUT_SEL1 and SDOUT_SEL 0 select which SDOUT pin of the CS5364 is sent to the
CS8406.
0x00 SDOUT1 (Channel 1, 2)
0x01 SDOUT2 (Channel 3, 4)
0x1x Reserved
TDM2PCM/PCM selects the clock source for the CS8406.
0x00 8406 Clock Source is CS5364
0x01 8406 Clock Source is the FPGA TDM2PCM engine
4. CDB5364 HARDWARE
The CDB5364 Evaluation Board has a number of connections, switches and jumpers that provide ease and conve-
nience for quickly evaluating the most commonly used functions of the CS5364 silicon device. The following tables
list the purpose of each hardware option on the Evaluation Board.
4.1 Input and Output Connectors
The input and output connectors provide power and signal connectivity to the CDB5364 Evaluation Board
as shown in Table 1.
DESIGNATOR
NAME
J6
GND
J2
+5 V
J16
+12 V
J17
-12 V
J20
AIN1
J21
AIN2
J22
AIN4
J23
AIN3
OPT1
Optical Output
J3
Coax Output
J5
RS232 I/O
J10
USB I/O
CLASS
Ground
Power
Power
Power
Analog Input
Analog Input
Analog Input
Analog Input
Digital Output
Digital Output
Digital I/O
Digital I/O
FUNCTION
Ground connection from power supply
+ 5 Volt power for CS5364
+12 V power for the active input buffers
-12 V power for the active input buffers
Analog input channel 1
Analog input channel 2
Analog input channel 4
Analog input channel 3
S/PDIF Optical Digital audio output
S/PDIF Coaxial Digital audio output
FlexGUI Interface port to PC
FlexGUI Interface port to PC
Table 1. CDB5364 Input and Output Connectors
DS625DB1
9
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