CDB4361 データシートの表示（PDF） - Cirrus Logic

部品番号

コンポーネント説明

一致するリスト

CDB4361

Evaluation Board for CS4361

Cirrus Logic 

CDB4361

CDB4361 SYSTEM OVERVIEW

The CDB4361 evaluation board is an excellent means of quickly evaluating the CS4361. The CS8416 digital audio

interface receiver provides an easy interface to digital audio signal sources including the majority of digital audio test

equipment. The evaluation board also allows the user to supply external PCM clocks and data through a PCB head-

er for system development.

The CDB4361 schematic has been partitioned into six schematics shown in Figures 41 through 46. Each partitioned

schematic is represented in the system diagram shown in Figure 40. Notice that the system diagram also includes

the interconnections between the partitioned schematics.

1. CS4361 DIGITAL-to-ANALOG CONVERTER

A description of the CS4361 is included in the CS4361 datasheet.

2. CS8416 DIGITAL AUDIO RECEIVER

The system receives and decodes the standard S/PDIF data format using a CS8416 Digital Audio Receiver,

Figure 42. The outputs of the CS8416 include a serial bit clock, serial data, left-right clock, and a 128/256 Fs master

clock. The CS8416 data format is selected using switch S3. The operation of the CS8416 and a discussion of the

digital audio interface is included in the CS8416 datasheet.

The evaluation board has been designed such that the input can be either optical or coaxial, see Figure 42. How-

ever, both inputs cannot be driven simultaneously.

The bottom switch of S3 sets the output MCLK to LRCK ratio of the CS8416. This switch should be set to 256

(closed) for inputs Fs≤96 kHz and 128 (open) for Fs≥64 kHz. The 8416 must be manually reset using RESET (S1)

when this switch is changed.

3. INPUT FOR CLOCKS AND DATA

The evaluation board has been designed to allow interfacing to external systems via the header J37. Header J37

allows the evaluation board to accept externally generated PCM clocks and data. The schematic for the clock/data

input is shown in Figure 43. The top switch of S3 selects the source as either CS8416 (open) or header J37 (closed).

Please see the CS4361 datasheet for more information.

4. POWER SUPPLY CIRCUITRY

Power is supplied to the evaluation board by two binding posts (GND and +5 V), see Figure 46. VL and VA can be

jumpered separately to either the on board +3.3 V regulator or the +5 V binding post.

WARNING: Refer to the CS4361 datasheet for maximum allowable voltages levels. Operation outside of this range

can cause permanent damage to the device.

5. GROUNDING AND POWER SUPPLY DECOUPLING

As with any high-performance converter, the CS4361 requires careful attention to power supply and grounding ar-

rangements to optimize performance. Figure 41 details the connections to the CS4361 and Figures 47, 48, and 49

show the component placement and top and bottom layout. The decoupling capacitors are located as close to the

CS4361 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated

noise.

4

DS672DB2

Share Link: