SNAD01B
8-CHANNEL 8-BIT ADC
3. After SNAD01B enters power down (mode 1: command 111), SNAD01B sends “1” out to
DIO until a valid logic transition appears on any wakeup-enabled digital input channel. Once
the transition occurs, SNAD01B toggles DIO to “0” to inform host controller. After receiving
“0” from DIO, host controller should turn START back to “1” to inform SNAD01B that the
power-down stage is over. Otherwise, SNAD01B keeps sending out “1” to DIO and does not
recognize any other transitions any the channels.
4. The CLK may stop but START ought to remain at LOW level in the whole power down
mode.
Note:
1. Wakeup function is only dedicated to the channel which is digital input type AND
wakeup-enabled.
2. In SNAD01B version, the standby current will more than 50uA in AD conversion
reference voltage use “REF” pin connected external voltage.
Bandgap reference
VDD
to reference
high of the ADC
ON CHIP
OFF CHIP
1.2v
bandgap
reference
VSS
RF
RF+RF MB
REF
PAD
Figure8 Circuit diagram of ADC bandgap reference selection
If the internal bandgap reference is turned ON (RF=1), the reference voltage of ADC is
supplied by output voltage of the internal bandgap reference circuit. This bandgap
consumes about 300 µA. The output voltage of bandgap reference is around 1.17V
typically.
Note: MB for chip test only. Always set MB=0 with command (011) in System Power-On
Initialization Routine.
Version: 1.3
11
July 31, 2003