IS63LV1024L-10B データシートの表示（PDF） - Integrated Silicon Solution

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IS63LV1024L-10B

128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT

Integrated Silicon Solution 

IS63LV1024L

ISSI ®

READ CYCLE SWITCHING CHARACTERISTICS(1) (Over Operating Range)

Symbol Parameter

tRC Read Cycle Time

tAA Address Access Time

tOHA Output Hold Time

tACE CE Access Time

tDOE OE Access Time

tLZOE(2) OE to Low-Z Output

tHZOE(2) OE to High-Z Output

tLZCE(2) CE to Low-Z Output

tHZCE(2) CE to High-Z Output

tPU CE to Power Up Time

tPD CE to Power Down Time

-8 ns

-10 ns

-12 ns

Min. Max.

Min. Max.

Min. Max.

Unit

8

—

10 —

12

—

ns

—

8

—

10

—

12

ns

2

—

2

—

2

—

ns

—

8

—

10

—

12

ns

—

4

—

5

—

6

ns

0

—

0

—

0

—

ns

0

4

0

5

0

6

ns

3

—

3

—

3

—

ns

0

4

0

5

0

6

ns

0

—

0

—

0

—

ns

—

8

—

10

—

12

ns

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and C1

output loading specified in Figure 1.

2. Tested with the C2 load in Figure 1. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

AC TEST CONDITIONS

Parameter

Input Pulse Level

Input Rise and Fall Times

Input and Output Timing

and Reference Levels

Output Load

Unit

0V to 3.0V

3 ns

1.5V

See Figures 1a and 1b

AC TEST LOADS

ZOUT = 50 Ω

OUTPUT

50 Ω

VT = 1.5V

3.3V

317 Ω

OUTPUT

5 pF

Including

jig and

scope

351 Ω

Figure 1

Figure 2

Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774

5

Rev. B

08/07/02

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