78Q8430 データシートの表示（PDF） - Teridian Semiconductor Corporation

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78Q8430

10/100 Ethernet MAC and PHY

Teridian Semiconductor Corporation 

78Q8430 Data Sheet

DS_8430_001

3.2.5 GBI Data Pins

Table 6: GBI Data Pin Descriptions

Signal

DATA31

DATA30

DATA29

DATA28

DATA27

DATA26

DATA25

DATA24

DATA23

DATA22

DATA21

DATA20

DATA19

DATA18

DATA17

DATA16

DATA15

DATA14

DATA13

DATA12

DATA11

DATA10

DATA9

DATA8

DATA7

DATA6

DATA5

DATA4

DATA3

DATA2

DATA1

DATA0

Pin Number

69

68

67

66

65

64

63

62

59

58

57

56

55

54

53

52

49

48

47

46

45

42

41

40

39

38

33

32

31

30

29

28

Type

B

Description

Data Bus DATA[31:0]

Bi-directional host bus data. The BOOTSZ pins determine how

many of these are actually used. The OE input will disable the

output drivers to prevent bus collisions.

14

Rev. 1.2

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