GS1582 データシートの表示（PDF） - Semtech Corporation
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GS1582
Semtech Corporation
GS1582 Datasheet PDF : 115 Pages
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Table 1-1: Pin Descriptions (Continued)
Pin
Number
F3
F4
F10
G1, H10
G2, H9
G3
G4
G5
Name
Timing
Type Description
DETECT_TRS
RSV
RSET
IO_VDD
IO_GND
TIM_861
20bit/10bit
DVB_ASI
Non
Synchronous
–
Analog
Non
Synchronous
Non
Synchronous
Non
Synchronous
Non
Synchronous
Non
Synchronous
Input
–
Input
Input
Power
Input
Power
Input
Input
Input
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select external HVF timing mode or TRS Extraction timing
mode.
When DETECT_TRS = LOW, the device will use timing from the
externally supplied H:V:F or CEA-861 timing signals, dependent on
the state of the TIM_861 pin.
When DETECT_TRS = HIGH, the device will extract timing from TRS
signals embedded in the supplied video stream.
Reserved. Do not connect.
An external 1% resistor connected to this input is used to set the
SDO/SDO output amplitude.
Power supply connection for digital I/O buffers. Connect to +3.3V or
+1.8V DC digital.
Ground connection for digital I/O buffers. Connect to digital GND.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select external CEA-861 timing mode.
When DETECT_TRS = LOW and TIM_861 = LOW, the device will use
externally supplied H:V:F timing signals.
When DETECT_TRS = LOW and TIM_861 = HIGH, the device will use
externally supplied HSYNC, VSYNC, DE timing signals.
When DETECT_TRS = HIGH, the device will extract timing from TRS
signals embedded in the supplied video stream.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
Used to select the input data bus width.
CONTROL SIGNAL INPUT
Signal levels are LVCMOS/LVTTL compatible.
When set HIGH, the device is configured for the transmission of
DVB-ASI data in SD mode (SD/HD = HIGH).
When set LOW, the device will not support the encoding of DVB-ASI
data.
NOTE: When operating in DVB-ASI mode the SD/HD pin must be set
HIGH and SMPTE_BYPASS must be set LOW.
GS1582 Multi-Rate Serializer with Cable Driver, Audio
Multiplexer and ClockCleanerTM
Data Sheet
40117 - 4
December 2011
14 of 115
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