GPDS207A データシートの表示（PDF） - Unspecified
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GPDS207A Datasheet PDF : 17 Pages
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Preliminary
GPDS207A/GPDS208A
Audio Decoder with Card Reader
1. GENERAL DESCRIPTION
The GPDS207A/ GPDS208A is highly integrated system-on-a chip
and targets a cost-effective, high performance micro-controller
solution for car dongle MP3 application applications. It
embedded μ’nSP® 2.0 (16-bit CPU developed by Sunplus
Technology), two-channel DMA controller, six-channel 16-bit
timers, SD/MMC memory interface, USB mini-host/device, SPI
master/slave controller, I2C master/slave controller, programmable
I/O ports, 16-bit DAC for audio playback, 10-bit ADC for AD key,
PLL, and embedded SRAM and ROM.
Providing a complete set of system peripherals, the GPDS207A/
GPDS208A chip minimizes overall system costs and eliminates
the need to configure additional components. The GPDS207A/
GPDS208A features not only the high-speed performance and low
cost for a system.
2. BLOCK DIAGRAM
16 GPIO
6 Timers
2-ch DMA
μ’nSP™ 2.0
SRAM
ROM
SD/MMC Controller
SPI Master/Slave
I2C
USB
mini-host/device
Controller
USB Transceiver
System Control
DAC/ADC Control
RTC
PLL
16-bits DAC
10-bits ADC
Regulator
3. FEATURES
μ’nSP® 2.0 16-bit CPU with frequency up to 48MHz.
SRAM for programming or LCD frame buffers.
ROM for embedded algorithm.
Two-channel DMA controller.
Universal Serial Bus (USB) 2.0 full speed compliant device and
USB mini-host with built-in transceiver.
Watch-dog timer.
Real-time clock.
Six 16-bit timer.
SD/MMC memory interface.
SPI master/slave interface.
I2C Interface.
30 Programmable general I/O ports (GPIO) with pull-high/low
control.
Power manager.
3.0V to 1.8V Regulator.
Low voltage reset.
USB transceiver.
High speed and low speed PLL.
16-bit stereo DAC for audio playback.
10-bit ADC with 4 line-in.
© Generalplus Technology Inc.
3
Proprietary & Confidential
MAY 14, 2009
Preliminary Version: 0.1
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