CS5376-BS データシートの表示（PDF） - Cirrus Logic
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CS5376-BS Datasheet PDF : 122 Pages
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CS5376
12.1 Synchronous Clocking ................................................................................................... 80
12.2 Synchronization Signals ................................................................................................ 80
12.3 CS5376 Internal Synchronization .................................................................................. 81
12.3.1 Sinc Filter Synchronization ............................................................................... 81
12.3.2 Decimation Engine Synchronization ................................................................. 82
12.3.3 SD Port Synchronization ................................................................................... 82
12.3.4 Time Break Synchronization ............................................................................. 82
12.3.5 Test Bit Stream Synchronization ....................................................................... 82
12.4 Modulator Synchronization ........................................................................................... 82
13.1 TBS Generator Architecture .......................................................................................... 84
13.2 TBS Pin Descriptions ..................................................................................................... 84
13.3 TBS Data Source ........................................................................................................... 85
13.3.1 TBS ROM Data ................................................................................................. 85
13.3.2 TBS Uploaded Data .......................................................................................... 85
13.4 TBS Configuration ......................................................................................................... 85
13.4.1 Interpolation Factor ........................................................................................... 86
13.4.2 Clock Rate ........................................................................................................ 86
13.4.3 Clock Delay ....................................................................................................... 86
13.4.4 Loopback Enable .............................................................................................. 86
13.4.5 Run Enable ....................................................................................................... 86
13.4.6 Data Delay ........................................................................................................ 86
14. GENERAL PURPOSE I/O PINS ........................................................................................... 88
14.1 GPIO Input Mode ........................................................................................................... 88
14.2 GPIO Output Mode ........................................................................................................ 88
14.2.1 GPIO Read In Output Mode .............................................................................. 88
14.3 GPIO Chip Select .......................................................................................................... 89
14.4 GPIO Pin Descriptions ................................................................................................... 89
15. JTAG TEST PORT (IEEE 1149.1) ........................................................................................ 92
15.1 JTAG Pin Definitions ..................................................................................................... 92
15.2 JTAG Architecture ......................................................................................................... 92
15.2.1 TAP Controller .................................................................................................. 92
15.2.2 Boundary Scan Cells ........................................................................................ 93
16. WATCHDOG TIMER ............................................................................................................ 94
16.1 Watchdog Timer Initialization ........................................................................................ 94
16.2 Watchdog Timer Restart ................................................................................................ 94
17. REGISTER SUMMARY ........................................................................................................ 97
DS256PP1
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