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CS5376-BS データシートの表示(PDF) - Cirrus Logic

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CS5376-BS Datasheet PDF : 122 Pages
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CS5376
3rd order infinite impulse response filter with any
corner frequency in the measurement bandwidth.
A set of on-chip FIR and IIR coefficients are in-
cluded in the CS5376 to provide an easy set up for
applications that do not require custom filter coef-
ficients. These coefficients have excellent filtering
characteristics, with the low-pass FIR filters having
a corner frequency at 40% fs, in-band ripple less
than ±0.01 dB, and stop-band attenuation greater
than 130 dB. The high-pass IIR filter provides a 3rd
order Butterworth response with a corner frequen-
cy at 2% fs.
Programmable Gain and Offset Correction
The final operation of the digital filter is to apply a
user defined gain and offset correction to the output
data. The gain correction value is independently
programmable for each channel and is used to nor-
malize sensor gain across a network. Similarly, the
offset correction is independently programmable
for each channel and is used to correct for DC off-
set in a sensor. The CS5376 also includes a built in
offset calibration routine that will calculate offset
correction values automatically.
2.3 Integrated Hardware Peripherals
High Speed Serial Data Output Port
After filtering is completed, each 24-bit output
sample is combined with an 8-bit status word that
encodes the channel number, a time break flag, and
any error conditions. This 32-bit data word is writ-
ten to an 8-deep FIFO buffer and then transmitted
on request to the communications interface through
the high speed serial data output port. In a typical
system, the communication interface will be a pro-
prietary design.
Test Bit Stream Generator
The CS5376 includes a programmable test bit
stream (TBS) generator that produces a 1-bit ∆−Σ
modulated bitstream with 24-bits of precision, suit-
able for driving a test DAC to verify the analog per-
formance of the conversion channel. The TBS
generator also includes an internal digital loopback
option so the digital filters and communication in-
terface can be tested independently of the analog
circuitry. The TBS generator can easily be pro-
grammed to produce a number of test signals using
the included 1024 point sine wave data table. By
writing a single configuration register many com-
mon test frequencies can be generated, including
31.25 Hz, 50.0 Hz, and 125.0 Hz. Custom test sig-
nal frequencies can be generated by writing a new
sine wave data table.
Secondary SPI Port
A secondary master mode SPI 2 port allows serial
peripherals to be controlled through the primary
SPI 1 port. The CS5376 acts as an arbiter to con-
duct transactions between the communications in-
terface connected to the primary SPI 1 port and
serial peripherals connected to the secondary SPI 2
port. This simplifies system design by requiring
only one SPI connection to the communication in-
terface to control the CS5376 and multiple serial
peripherals.
General Purpose I/O Pins
Twelve general purpose I/O pins on the CS5376
can be used for local hardware control or as chip se-
lects for the SPI ports. These pins are independent-
ly programmable as inputs or outputs, with or
without an internal pull-up resistor.
JTAG Test Port
The CS5376 includes a standard IEEE 1149.1
JTAG test port for system level testing via bound-
ary scan.
Clock and Synchronization Block
A clock and synchronization block in the CS5376
establishes synchronous timing when used in a dis-
tributed measurement network. An input SYNC
signal from the host system resets the modulator
DS256PP1
10

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