CPF121F データシートの表示（PDF） - YCL Electronics

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CPF121F

Asymmetric Digital Subscriber Line

YCL Electronics  

Product Specification

CPF121F

Note :

Applying an input test signal of – 6 dBv emf to either the POTS or LINE port of the splitter ,

the maximum output voltage level measured over the load impedance shall be below the

template of figure 1.

Figure 1 : On – hook voltage gain template

( maximum allowed output voltage with input of – 6dBV)

4.4. ZADSL defined (Clause 5.2.1) : 1

This substitute circuit shown in below is a model which shall be applied to a POTS splitter

when verifying requirements of the low pass filter.

The purpose of this model impedance is for splitter specifications ,it is not a requirement on

the input impedance of the ADSL transceiver.

Data sheet subject to change without notice

RDPS-POTS438(R1)12/25/2002

SHEET 9 OF 14

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