HD74ALVCH16836 データシートの表示（PDF） - Hitachi -> Renesas Electronics

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HD74ALVCH16836

20-bit Universal Bus Driver with 3-state Outputs

Hitachi -> Renesas Electronics 

HD74ALVCH16836

20-bit Universal Bus Driver with 3-state Outputs

ADE-205-213 (Z)

Preliminary

1st. Edition

January 1998

Description

This 20-bit universal bus driver is designed for 2.3 V to 3.6 V VCC operation.

Data flow from A to Y is controlled by the output enable (O E) input. The device operates in the

transparent mode when the latch enable (LE) input is low. The A data is latched if the clock (CLK) input is

held at a high or low logic level. If LE is high, the A data is stored in the latch flip flop on the low to high

transition of CLK. When OE is high, the outputs are in the high impedance state.

To ensure the high impedance state during power up or power down, OE should be tied to VCC through a

pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the

driver.

Active bus hold circuitry is provided to hold unused or floating inputs at a valid logic level.

Features

• VCC = 2.3 V to 3.6 V

• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)

• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)

• High output current ±24 mA (@VCC = 3.0 V)

• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors

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