SM5877AM データシートの表示（PDF） - Nippon Precision Circuits
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SM5877AM Datasheet PDF : 16 Pages
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BLOCK DIAGRAM
SM5877AM
LRCI
BCKI
DI
MODE
ATCK
MUTE
RSTN
DS
DVSS
DVDD
TSTN
TO1
Attenuation
counter
Timing
control
Input interface
L
R
Filter & attenuation
operation block
L
R
L
PWM data
generation block
R
Noise shaper
operation block
AVDDL
MUTEO
DEEM
CKO
XVSS
XTO
XTI
XVDD
AVDDR
−+
LO
AVSS
RO
PIN DESCRIPTION
Number
1
2
3
4
5
6
7
8
9
Name
MUTE
DEEM
CKO
DVSS
BCKI
DI
DVDD
LRCI
TSTN
I/O
Description
When MODE is HIGH: Soft mute ON/OFF control. Mute is active when HIGH.
Ip When MODE is LOW: Attenuator level direction control. The attenuator direction is
down when HIGH.
Ip Deemphasis control. Deemphasis is ON when HIGH, and OFF when LOW.
O 16.9344 MHz clock output
Digital ground pin
Ip Bit clock input pin
Ip Serial data input pin
Digital supply pin
Ip
Input sample data rate (fs) clock input pin. Left-channel input when HIGH, and right-
channel input when LOW.
Ip Test pin. Test mode when LOW.
NIPPON PRECISION CIRCUITS—2
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