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P4C187-25LMB データシートの表示(PDF) - Semiconductor Corporation

部品番号
コンポーネント説明
一致するリスト
P4C187-25LMB
PYRAMID
Semiconductor Corporation PYRAMID
P4C187-25LMB Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
P4C187/187L
AC CHARACTERISTICS - WRITE CYCLE
(VCC = 5V ± 10%, All Temperature Ranges)(2)
Symbol Parameter
-10
-12
-15
-20
-25
-35
-45
-55
-70
-85
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max Min Max
tWC Write Cycle Time
10
12
15
20
25
35
45
55
70
85
tCW
Chip Enable Time to
End of Write
8
tAW
Address Valid to End
of Write
8
10
12
15
20
25
30
35
40
45
10
12
15
20
25
30
35
40
45
tAS Address Set-up Time 0
0
0
0
0
0
0
0
0
0
tWP Write Pulse Width
tAH
Address Hold Time
from End of Write
tDW
Data Valid to End of
Write
tDH Data Hold Time
tWZ
Write Enable to
Output in High Z
tOW
Output Active from
End of Write
8
10
12
15
20
25
30
35
40
45
0
0
0
0
0
0
0
0
0
0
6
7
10
13
15
20
25
30
35
40
0
0
0
0
0
0
0
0
0
0
6
7
8
12
15
17
20
25
30
35
0
0
0
0
0
0
0
0
0
0
TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE CONTROLLED)(9)
Notes:
9. CE and WE must be LOW for WRITE cycle.
10. If CE goes HIGH simultaneously with WE HIGH, the output remains
in a high impedance state.
11. Write Cycle Time is measured from the last valid address to the first
transition address.
Document # SRAM111 REV B
Page 5 of 12

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