CXD3000R データシートの表示（PDF） - Sony Semiconductor
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CXD3000R Datasheet PDF : 129 Pages
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CXD3000R
Pin Symbol
I/O
No.
83 AO2F O 1, Z, 0
84 AVDD4
85 AVDD5
86 XTLO O 1, 0
87 XTLI
I
88 AVSS5
89 AVSS3
91 AO1F O 1, Z, 0
92 AO1R O 1, Z, 0
93 AVDD3
94 AVDD4
95 SENS O 1, Z, 0
96 DIRC
I
97 SCLK
I
98 ATSK
I
99 DATA
I
100 XLAT
I
101 CLOK I
102 DVSS4
103 COUT I/O 1, 0
104 MIRR I/O 1, 0
105 DFCT I/O 1, 0
106 FOK
I/O 1, 0
111 TESTA
112 PWMI I
113 FSW
O 1, Z, 0
114 MON
115 MDP
116 MDS
O 1, 0
O 1, 0
O 1, 0
117 LOCK I/O 1, 0
118 SSTP
119 DVSS5
120 SFDR
121 SRDR
122 TFDR
I
O 1, 0
O 1, 0
O 1, 0
Description
Channel 2 DAC PWM output (forward phase).
Analog power supply.
Master clock power supply.
Master clock crystal oscillation circuit output.
Master clock crystal oscillation circuit input.
Master clock GND.
Analog GND.
Channel 1 DAC PWM output (forward phase).
Channel 1 DAC PWM output (reversed phase).
Analog power supply.
Digital power supply.
SENS output to CPU.
Used during 1-track jumps.
SENS serial data readout clock input.
Anti-shock pin.
Serial data input from CPU.
Latch input from CPU. Serial data is latched at the falling edge.
Serial data transfer clock input from CPU.
Digital GND.
Track count signal I/O.
Mirror signal I/O.
Defect signal I/O.
Focus OK signal I/O.
Test pin. Leave this open.
Spindle motor external pin input.
Spindle motor output filter switching output.
GRSCOR output when $8 command SCOR SEL = high.
Spindle motor on/off control output.
Spindle motor servo control output.
Spindle motor servo control output.
GFS is sampled at 460Hz; when GFS is high, this pin outputs a high signal.
If GFS is low eight consecutive samples, this pin outputs low. Input when
LKIN = high.
Disc innermost track detection signal input.
Digital GND.
Sled drive output.
Sled drive output.
Tracking drive output.
–7–
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