SII1292 データシートの表示（PDF） - Silicon image

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SII1292

MHL Bridge and HDMI Monitor Receiver

Silicon image 

SiI1292 MHL Bridge and HDMI Monitor Receiver

Data Brief

Silicon Image, Inc.

Pin Mapping

Figure 2 shows the pin assignments of theSiI1292 receiver. Pin names are generalized by type for this document. The list

below the diagram describes the purpose of each type. The package is 40-pin QFN with ePad.

40 39 38 37 36 35 34 33 32 31

RSVDL 1

VDD12 2

RSVDL 3

RST 4

SIG_PWR_I 5

SIG_O 6

DDC_BUS 7

DDC_BUS 8

9

VDD5 10

SiI1292

(Top View)

The ePad must be

grounded

30 VDD12

29 TMDS_O

28 TMDS_O

27 TMDS_O

26 TMDS_O

25 TMDS_O

24 TMDS_O

23 TMDS_O

22 TMDS_O

21 SIG_I

11 12 13 14 15 16 17 18 19 20

TMDS_I -- TMDS Input

TMDS_O -- TMDS Output

DDC_BUS -- DDC Bus, OD, 5 V Tolerant

SIG_PWR_I -- Internal Power Supply Control Signal

SIG_I/O -- Signal Input/Output, 5 V Tolerant

RST -- Active LOW reset

GPIO -- GPIO Pin, 5 V tolerant

I2C_BUS -- I2C Bus

CTRL_SIG_I/O -- Control Signal I/O

SIG_I -- Signal Input, 5 V tolerant

SIG_O -- Signal Output, 5 V tolerant, open drain

RSVDL -- Reserved pin, tie LOW

Figure 2. Pin Mapping

2

© 2010-2011 Silicon Image, Inc. All rights reserved.

SiI-DB-1093-A

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