RTL8111 データシートの表示（PDF） - Realtek Semiconductor

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RTL8111

INTEGRATED GIGABIT ETHERNET CONTROLLER FOR PCI EXPRESS™ APPLICATIONS

Realtek Semiconductor 

RTL8111

Datasheet

When the RTL8111 is in power down mode, e.g., D1-D3, the IO and MEM accesses to the RTL8111 are

disabled. After a PERSTB assertion, the device’s power state is restored to D0 automatically if the original

power state was D3cold. There is almost no hardware delay at the device’s power state transition. When in

ACPI mode, the device does not support PME (Power Management Enable) from D0 (this is the Realtek

default setting of the PMC register auto-loaded from EEPROM). The setting may be changed from the

EEPROM, if required.

6.7. Vital Product Data (VPD)

Bit 31 of the Vital Product Data (VPD) capability structure in the RTL8111’s PCI Configuration Space is

used to issue VPD read/write commands and is also a flag used to indicate whether the transfer of data

between the VPD data register and the 93C46/93C56 has completed or not.

1. Write VPD register: (write data to the 93C46/93C56)

Set the flag bit to 1 at the same time the VPD address is written to write VPD data to EEPROM.

When the flag bit is reset to 0 by the RTL8111, the VPD data (4 bytes per VPD access) has been

transferred from the VPD data register to EEPROM.

2. Read VPD register: (read data from the 93C46/93C56)

Reset the flag bit to 0 at the same time the VPD address is written to retrieve VPD data from

EEPROM. When the flag bit is set to 1 by the RTL8111, the VPD data (4 bytes per VPD access)

has been transferred from EEPROM to the VPD data register.

Note 1: Refer to the PCI 2.2 Specifications for further information.

Note 2: The VPD address must be a DWORD-aligned address as defined in the PCI 2.2 Specifications.

VPD data is always consecutive 4-byte data starting from the VPD address specified.

Note 3: Realtek reserves offset 40h to 7Fh in EEPROM mainly for VPD data to be stored.

Note 4: The VPD function of the RTL8111 is designed to be able to access the full range of the

93C46/93C56 EEPROM.

Integrated Gigabit Ethernet Controller for PCI Express 15

Track ID: JATR-1076-21 Rev. 1.2

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