100307 データシートの表示（PDF） - Fairchild Semiconductor
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100307 Datasheet PDF : 6 Pages
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August 1989
Revised August 2000
100307
Low Power Quint Exclusive OR/NOR Gate
General Description
The 100307 is monolithic quint exclusive-OR/NOR gate.
The Function output is the wire-OR of all five exclusive-OR
outputs. All inputs have 50 kΩ pull-down resistors.
Features
s Low Power Operation
s 2000V ESD protection
s Pin/function compatible with 100107
s Voltage compensated operating range = −4.2V to −5.7V
s Available to industrial grade temperature range
(PLCC package only)
Ordering Code:
Order Number Package Number
Package Description
1000307PC
N24E
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
1000307QC
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
1000307QI
V28A
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (−40°C to +85°C)
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagrams
24-Pin DIP
Pin Descriptions
Pin Names
Dna–Dne
F
Oa–Oe
Oa–Oe
Description
Data Inputs
Function Output
Data Outputs
Complementary
Data Outputs
Logic Equation
F = (D1a ⊕ D2a) + (D1b ⊕ D2b) + (D1c ⊕ D2c) +
(D1d ⊕ D2d) + (D1e ⊕ D2e).
© 2000 Fairchild Semiconductor Corporation DS010582
28-Pin PLCC
www.fairchildsemi.com
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