MDT2010
Mnemonic
Instruction Code Operands
Function
010000 00000rrr CPIO R Control I/O port register
010001 1rrrrrrr STWR R Store W to register
011000 trrrrrrr
LDR R, t Load register
111010 iiiiiiii
LDWI I Load immediate to W
010111 trrrrrrr
SWAPR R, t Swap halves register
011001 trrrrrrr
011010 trrrrrrr
011011 trrrrrrr
011100 trrrrrrr
INCR R, t Increment register
INCRSZ R, t Increment register, skip if
zero
ADDWR R, t Add W and register
SUBWR R, t Subtract W from register
011101 trrrrrrr
011110 trrrrrrr
010010 trrrrrrr
110100 iiiiiiii
010011 trrrrrrr
110101 iiiiiiii
010100 trrrrrrr
110110 iiiiiiii
011111 trrrrrrr
010110 trrrrrrr
DECR R, t Decrement register
DECRSZ R, t Decrement register, skip if
zero
ANDWR R, t AND W and register
ANDWI i AND W and immediate
IORWR R, t Inclu. OR W and register
IORWI i Inclu. OR W and immediate
XORWR R, t Exclu. OR W and register
XORWI i Exclu. OR W and immediate
COMR R, t Complement register
RRR R, t Rotate right register
010101 trrrrrrr
RLR R, t Rotate left register
010000 1xxxxxxx
010001 0rrrrrrr
0000bb brrrrrrr
0010bb brrrrrrr
0001bb brrrrrrr
0011bb brrrrrrr
1000nn nnnnnnnn
CLRW
CLRR R
BCR R, b
BSR R, b
BTSC R, b
BTSS R, b
LCALL n
Clear working register
Clear register
Bit clear
Bit set
Bit Test, skip if clear
Bit Test, skip if set
Long CALL subroutine
1010nn nnnnnnnn LJUMP n Long JUMP to address
Operating Status
W→CPIO r
W→R
R→t
I→W
[R(0~3) ↔
R(4~7)]→t
R + 1→t
R + 1→t
None
None
Z
None
None
Z
None
W + R→t
R ﹣W→t
(R+/W+1→t)
R ﹣1→t
R ﹣1→t
C, HC, Z
C, HC, Z
Z
None
R ∩ W→t
i ∩ W→W
R ∪ W→t
i ∪ W→W
R ⊕ W→t
i ⊕ W→W
/R→t
R(n) →R(n-1),
C→R(7),
R(0)→C
R(n)→r(n+1),
C→R(0),
R(7)→C
0→W
0→R
0→R(b)
1→R(b)
Skip if R(b)=0
Skip if R(b)=1
n→PC,
PC+1→Stack
n→PC
Z
Z
Z
Z
Z
Z
Z
C
C
Z
Z
None
None
None
None
None
None
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 7
VER 1.1