UPD720101 データシートの表示（PDF） - NEC => Renesas Technology

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UPD720101

USB2.0 HOST CONTROLLER

NEC => Renesas Technology 

µPD720101

3. ELECTRICAL SPECIFICATIONS

3.1 Buffer List

• 3 V input buffer with pull down resistor

NTEST1, TEST, SRMOD, NANDTEST, SMC, AMC, TEB

• 3 V PCI IOL = 9 mA 3-state output buffer

PPON(5:1), SRCLK

• 3 V IOL = 9 mA bi-directional buffer

LEGC, SRDTA

• 3 V IOL = 9 mA bi-directional buffer with enable (OR type)

OCI(5:1)

• 3 V oscillator interface

XT1/SCLK, XT2

• 5 V input buffer

VBBRST0, VCCRST0

• 5 V IOL = 12 mA N-ch open drain buffer

SMI0, PME0, INTA0, INTB0, INTC0, SERR0

• 5 V PCI input buffer with enable (OR type)

PCLK, GNT0, IDSEL

• 5 V PCI IOL = 12 mA 3-state output buffer

REQ0

• 5 V PCI IOL = 9 mA bi-directional buffer with input enable (OR-type)

AD(31:0), CBE(3:0)0, PAR, FRAME0, IRDY0, TRDY0, STOP0, DEVSEL0, PERR0, CRUN0

• USB interface, analog signal

DP(5:1), DM(5:1), RSDP(5:1), RSDM(5:1), RREF

Above, “5 V” refers to a 3 V buffer with 5 V tolerant circuit. Therefore, it is possible to have a 5 V connection for an

external bus, but the output level will be only up to 3 V, which is the VDD voltage. Similarly, “5 V PCI” above refers to a

PCI buffer that has a 5 V tolerant circuit, which meets the 3 V PCI standard; it does not refer to a PCI buffer that

meets the 5 V PCI standard.

Data Sheet S16265EJ4V0DS

13

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