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MMBTA92LT1 データシートの表示(PDF) - Silicon Laboratories

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MMBTA92LT1
Silabs
Silicon Laboratories Silabs
MMBTA92LT1 Datasheet PDF : 36 Pages
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Si2493/57/34/15/04
Global ISOmodem-EVB
2.2. Modem Daughter Card Operation
The Si2493/57/34/15/04URT-EVB daughter card is a
complete modem solution perfectly suited for use in an
embedded system. The daughtercard contains both the
modem system-side chip and the isolated line interface
(DAA).
The daughter card requires a 3.3 V supply capable of
providing at least 35 mA and communicates with the
system via LVCMOS/TTL-compatible digital signals on
JP1. The RJ-11 jack (TIP and RING) is connected via
JP2. Be sure to provide the proper power-on reset pulse
to the daughter card if it is used in the stand-alone
mode.
2.2.1. Reset Requirements
The Si2493/57/34/15/04 ISOmodem® daughter card
must be properly reset at powerup. The reset pin (pin 8)
of the Si2493/57/34/15/04 (JP103, J101 pin 13) must be
held low for at least 5.0 ms after power is applied and
stabilized to ensure the device is properly reset.
2.2.2. Crystal Requirements
Clock accuracy and stability are important in modem
applications. To ensure reliable communication between
modems, the clock must remain within ±100 ppm of the
design value over the life of the modem. The crystal
selected for use in a modem application must have a
frequency tolerance of less than ±100 ppm for the
combination of initial frequency tolerance, drift over the
normal operating temperature range, and five year
aging. Other considerations, such as production
variations in PC board capacitance and the tolerance of
loading capacitors, must also be taken into account.
2.2.3. Protection
The Si2493/57/34/15/04-EVB meets or exceeds all FCC
and international PTT requirements and
recommendations for high-voltage surge and isolation
testing without any modification. The protection/isolation
circuitry includes C1, C2, C8, C9, FB1, FB2, and RV1.
The PCB layout is also a key “component” in the
protection circuitry. The Si2493/57/34/15/04-EVB
provides isolation to 3 kV. Contact Silicon Laboratories
for information about designing to higher levels of
isolation.
Rev. 0.7
11

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