IDT2305(2007) データシートの表示（PDF） - Integrated Device Technology
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IDT2305 Datasheet PDF : 11 Pages
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IDT2305
3.3V ZERO DELAY CLOCK BUFFER
COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES
TYPICAL DUTY CYCLE(1) AND IDD TRENDS(2) FOR IDT2305-1H
Duty Cycle vs VDD
(for 30pf loads over frequency - 3.3V, 25C)
60
58
56
54
52
50
48
46
44
42
40
3
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
Duty Cycle vs Frequency
(for 30pf loads over temperature - 3.3V)
60
58
56
54
52
50
48
46
44
42
40
20
40
60
80
100
120
140
Frequency (MHz)
IDD vs Number of Loaded Outputs
(for 30pf loads over frequency - 3.3V, 25C)
160
140
120
33M Hz
66MHz
100M Hz
-40C
0C
25C
70C
85C
Duty Cycle vs VDD
(for 10pF loads over frequency - 3.3V, 25C)
60
58
56
54
52
50
48
46
44
42
40
3
3.1
3.2
3.3
3.4
3.5
3.6
VDD (V)
Duty Cycle vs Frequency
(for 10pF loads over temperature - 3.3V)
60
58
56
54
52
50
48
46
44
42
40
20
40
60
80
100
120
140
Frequency (MHz)
IDD vs Number of Loaded Outputs
(for 10pF loads over frequency - 3.3V, 25C)
160
140
120
100
100
80
80
33M Hz
66MHz
60
100M Hz
60
33MHz
66MHz
100MHz
133MHz
-40C
0C
25C
70C
85C
33MHz
66MHz
100MHz
40
40
20
20
0
0
2
4
6
8
0
0
2
4
6
8
Number of Loaded Outputs
Number of Loaded Outputs
NOTES:
1. Duty Cycle is taken from typical chip measured at 1.4V.
2. IDD data is calculated from IDD = ICORE + nCVf, where ICORE is the unloaded current. (n = Number of outputs; C = Capacitance load per output (F); V = Supply Voltage (V);
f = Frequency (Hz))
9
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