BD82B65 データシートの表示（PDF） - Intel
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BD82B65 Datasheet PDF : 934 Pages
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13.8.1.8 PMIR—Power Management Initialization Register (PM—D31:F0) 516
13.8.1.9 GPIO_ROUT—GPIO Routing Control Register
(PM—D31:F0).................................................................... 516
13.8.2 APM I/O Decode Register.................................................................... 517
13.8.2.1 APM_CNT—Advanced Power Management Control Port
Register............................................................................ 517
13.8.2.2 APM_STS—Advanced Power Management Status Port
Register............................................................................ 517
13.8.3 Power Management I/O Registers ........................................................ 518
13.8.3.1 PM1_STS—Power Management 1 Status Register ................... 519
13.8.3.2 PM1_EN—Power Management 1 Enable Register..................... 521
13.8.3.3 PM1_CNT—Power Management 1 Control Register .................. 522
13.8.3.4 PM1_TMR—Power Management 1 Timer Register .................... 523
13.8.3.5 GPE0_STS—General Purpose Event 0 Status Register.............. 524
13.8.3.6 GPE0_EN—General Purpose Event 0 Enables Register ............. 527
13.8.3.7 SMI_EN—SMI Control and Enable Register............................. 529
13.8.3.8 SMI_STS—SMI Status Register ............................................ 531
13.8.3.9 ALT_GP_SMI_EN—Alternate GPI SMI Enable Register.............. 533
13.8.3.10 ALT_GP_SMI_STS—Alternate GPI SMI Status Register ............ 534
13.8.3.11 GPE_CNTL—General Purpose Control Register ........................ 534
13.8.3.12 DEVACT_STS — Device Activity Status Register ..................... 535
13.8.3.13 PM2_CNT—Power Management 2 Control Register .................. 535
13.9 System Management TCO Registers ................................................................... 536
13.9.1 TCO_RLD—TCO Timer Reload and Current Value Register ....................... 536
13.9.2 TCO_DAT_IN—TCO Data In Register .................................................... 537
13.9.3 TCO_DAT_OUT—TCO Data Out Register ............................................... 537
13.9.4 TCO1_STS—TCO1 Status Register ....................................................... 537
13.9.5 TCO2_STS—TCO2 Status Register ....................................................... 539
13.9.6 TCO1_CNT—TCO1 Control Register ...................................................... 540
13.9.7 TCO2_CNT—TCO2 Control Register ...................................................... 541
13.9.8 TCO_MESSAGE1 and TCO_MESSAGE2 Registers .................................... 541
13.9.9 TCO_WDCNT—TCO Watchdog Control Register ...................................... 542
13.9.10 SW_IRQ_GEN—Software IRQ Generation Register ................................. 542
13.9.11 TCO_TMR—TCO Timer Initial Value Register.......................................... 542
13.10 General Purpose I/O Registers ........................................................................... 543
13.10.1 GPIO_USE_SEL—GPIO Use Select Register ........................................... 544
13.10.2 GP_IO_SEL—GPIO Input/Output Select Register .................................... 544
13.10.3 GP_LVL—GPIO Level for Input or Output Register .................................. 545
13.10.4 GPO_BLINK—GPO Blink Enable Register ............................................... 545
13.10.5 GP_SER_BLINK—GP Serial Blink Register.............................................. 546
13.10.6 GP_SB_CMDSTS—GP Serial Blink Command
Status Register ................................................................................. 546
13.10.7 GP_SB_DATA—GP Serial Blink Data Register ......................................... 547
13.10.8 GPI_NMI_EN—GPI NMI Enable Register ................................................ 547
13.10.9 GPI_NMI_STS—GPI NMI Status Register............................................... 547
13.10.10 GPI_INV—GPIO Signal Invert Register.................................................. 548
13.10.11 GPIO_USE_SEL2—GPIO Use Select 2 Register ....................................... 548
13.10.12 GP_IO_SEL2—GPIO Input/Output Select 2 Register ............................... 549
13.10.13 GP_LVL2—GPIO Level for Input or Output 2 Register.............................. 549
13.10.14 GPIO_USE_SEL3—GPIO Use Select 3 Register ....................................... 550
13.10.15 GPIO_SEL3—GPIO Input/Output Select 3 Register ................................. 550
13.10.16 GP_LVL3—GPIO Level for Input or Output 3 Register.............................. 551
13.10.17 GP_RST_SEL1—GPIO Reset Select Register........................................... 551
13.10.18 GP_RST_SEL2—GPIO Reset Select Register........................................... 552
13.10.19 GP_RST_SEL3—GPIO Reset Select Register........................................... 552
14 SATA Controller Registers (D31:F2) ....................................................................... 553
14.1 PCI Configuration Registers (SATA–D31:F2) ........................................................ 553
14.1.1 VID—Vendor Identification Register (SATA—D31:F2).............................. 555
14.1.2 DID—Device Identification Register (SATA—D31:F2) .............................. 555
14.1.3 PCICMD—PCI Command Register (SATA–D31:F2) .................................. 555
14.1.4 PCISTS — PCI Status Register (SATA–D31:F2) ...................................... 556
14.1.5 RID—Revision Identification Register (SATA—D31:F2) ............................ 557
14.1.6 PI—Programming Interface Register (SATA–D31:F2) .............................. 557
14.1.6.1 When Sub Class Code Register (D31:F2:Offset 0Ah) = 01h...... 557
14.1.6.2 When Sub Class Code Register (D31:F2:Offset 0Ah) = 04h...... 557
14.1.6.3 When Sub Class Code Register (D31:F2:Offset 0Ah) = 06h...... 558
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