![](/html/Tmtech/8774/page5.png)
tm TE
CH
TIMING WAVEFORMS
READ CYCLE 1
(Address Controlled)
A d d re ss
DO UT
tR C
tA A
tO H
READ CYCLE 2
(Chip Enable Controlled)
Address
OE
CE
DOUT
tRC
tA A
tAOE
tOLZ
tACS
tCLZ
T14M1024A
tO H
tOH
tOHZ
tCHZ
DON'T CARE
UNDEFINED
TM Technology Inc. reserves the right
P. 5
to change products or specifications without notice.
Publication Date: SEP. 2002
Revision:E