7 Electrical specifications
VDD–1
VIH
Inputs
0V
VDD–1
Inputs
VIL
0V
Outputs
VDD
0V
Outputs
VDD
0V
tpHL
tpLH
1.5V
1.5V
Figure 7.2 AC measurements timing waveforms
7.3 AC timing characteristics
SYMBOL
PARAMETER
MIN
TDr
Input rising edges
2
TDf
Input falling edges
2
TQr
Output rising edges
TQf
Output falling edges
Notes
1 Non-link pins; see section on links.
2 All inputs except ClockIn; see section on ClockIn.
3 Guaranteed, but not tested.
Table 7.4 Input and output edges
MAX
20
20
25
15
UNITS
ns
ns
ns
ns
NOTES
1, 2, 3
1, 2, 3
1, 3
1, 3
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