ACS8515LC(2001) データシートの表示（PDF） - Semtech Corporation
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ACS8515LC
(Rev.:2001)
(Rev.:2001)
Semtech Corporation
ACS8515LC Datasheet PDF : 47 Pages
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ADVANCED COMMUNCIATIONS
ACS8515 LC/P
Line Card Protection Switch
for SONET or SDH Network Elements
FINAL
Description
The ACS8515 is a highly integrated, single-chip
solution for hit-less protection switching of SEC
clocks from Master and Slave SETS clockcards
in a SONET or SDH Network Element. The
ACS8515 has fast activity monitors on the in-
puts and will implement automatic system pro-
tection switching against master clock failure. A
further input is provided for an optional standby
SEC clock. The ACS8515 is fully compliant with
the required specifications and standards.
The ACS8515 can perform frequency translation
from a SEC input clock distributed along a back
plane to a different local line card clock, e.g. 8
kHz distributed on the back plane and 19.44 MHz
generated on the line cards.
An SPI serial port is incorporated, providing ac-
cess to the configuration and status registers for
device setup.
The ACS8515 can utilise either a low cost XO
oscillator module, or a TCXO with full tempera-
ture calibration - as required by the application.
Block Diagram
Features
Suitable for Stratum 3, 4E and 4 SONET
or SDH Equipment Clock (SEC) applications
Meets AT&T, ITU-T, ETSI and Telcordia
specifications
Three SEC input clocks, from 2 kHz to 155.52
MHz
Generates two SEC output clocks, up to 311.04
MHz
Frequency translation of SEC input clock to a
different local line card clock
Robust input clock source frequency and
activity monitoring on all inputs
Supports Free-Run, Locked and Holdover
modes of operation
Automatic hit-less source switchover on loss
of input
External force fast switch between SEC inputs
Phase build-out for output clock phase
continuity during input switchover
SPI compatible serial microprocessor interface
Programmable wander and jitter tracking/
attenuation 0.1 Hz to 20 Hz
Single 3.3 v operation. 5 v I/O compatible
Operating temperature (ambient) -40°C to
+85°C
Available in 64 pin LQFP package
3 x SEC Input
M a s te r/Slav e
+ Standby:
N x 8kHz
1. 54 4M H z
2. 04 8M H z
6.48M Hz
19 .4 4M H z
38 .8 8M H z
51 .8 4M H z
77 .7 6M H z
15 5. 5 2M H z
P lu s :
M FrSy n c
3xSEC
Inp ut
Ports
Monitors
MFrSync
DP LL
Frequency Synthesis
APLL
Frequency
Dividers
Chip C lock
Ge nera tor
P riorit y
T able
Re gis ter
Set
SPI Compatible Serial
M icroprocessor Port
2xSEC
O utp ut
Ports
FrSync
MFrSync
2 x SEC Output
in clu d in g :
1. 54 4/2 .0 4 8M H z
3. 08 8/4 .0 9 6M H z
6. 17 6/8 .1 9 2M H z
12 .3 5 2/ 1 6. 38 4M H z
19 .4 4M H z
38 .8 8M H z
15 5. 5 2M H z
31 1. 0 4M H z
Plu s :
2kHz MFrSync
8kHz FrSync
TCXO or XO
Revision 2.05/Jan 2001 ã2001 Semtech Corp
www.semtech.com
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